Senior Hardware Design Engineer

Our Hardware Engineering team is the backbone of Cisco's innovation, designing and delivering next-generation technology that powers the global network. We operate at the intersection of cutting-edge research and practical application, ensuring our products meet rigorous IEEE standards while optimizing for performance and user experience. Our diverse, cross-functional team thrives in a collaborative environment where we turn complex concepts into reliable, high-quality hardware solutions. We are problem-solvers and IP creators who challenge the status quo to drive the future of networking. Joining us means working at the forefront of industry-defining technology, where your technical expertise directly impacts global connectivity.

Own the design and delivery of complex hardware boards and subsystems for next-generation networking platforms. Drive schematic design, component selection, high-speed interface design, and power delivery, working closely with layout and signal integrity teams to achieve robust, manufacturable designs. Lead design reviews for your designs and contribute to team design guidelines and best practices. Perform design analysis, including power budget and margin analysis, to ensure reliable operation. Lead bring-up and debug of complex boards, and drive root cause analysis and corrective actions for lab and manufacturing issues. Provide technical guidance to junior engineers, and collaborate cross-functionally with system, diagnostics, and manufacturing teams to ensure seamless product deployment.

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks.  Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees

• 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

• Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees

• Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)

• 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next

• Additional paid time away may be requested to deal with critical or emergency issues for family members

• Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

• .75% of incentive target for each 1% of revenue attainment up to 50% of quota;

• 1.5% of incentive target for each 1% of attainment between 50% and 75%;

• 1% of incentive target for each 1% of attainment between 75% and 100%; and

• Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

Non-Metro New York state & Washington state:

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

• Bachelor’s degree in electrical engineering, Computer Engineering, or a related field with 5+ years of relevant experience, or a Master's degree with 3+ years of relevant experience.
• Prior experience owning board designs for networking and compute applications.
• Experience designing boards with x86 microprocessors and switching or custom ASICs, including high-speed interfaces such as PCIe (up to Gen 5).
• Experience leading bring-up and debug of boards.

• Working knowledge of signal integrity and power integrity principles, including interpreting simulation results.
• Proficiency with EDA tools for schematic capture and layout review (e.g., Cadence Allegro/OrCAD, Mentor).
• Familiarity with Design for Manufacturability (DFM) and Design for Testability (DFT) principles.
• Experience optimizing hardware for cost, performance, and power efficiency.
• Familiarity with hardware validation, test automation tools, and test frameworks.
• Hands-on proficiency with lab equipment such as oscilloscopes and logic or protocol analyzers.
• Experience working with cross-functional and manufacturing teams to transition designs into quality production.
• Strong hands-on experience in schematic design and component selection, with working knowledge of PCB stack-up, routing constraints, and layout reviews.
• Experience in power delivery design, including multi-phase VRMs, power sequencing, and decoupling.
• Experience performing design analysis such as power budget and timing analysis.