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Main task: Verify AI-related sophisticated ASIC designs & features with formal verification methods. Multi-functional Collaboration: Partner with architecture/RTL teams to specify properties, resolve deep design issues, and influence micro-architecture decisions.
Design novel GPU and system architectures to advance the forefront of AI Inference performance and efficiency. Construct, investigate, and test popular deep learning algorithms and applications.
As a key member of our ASIC Verification team, you will verify the design and implementation of inference accelerator. You will be responsible for verification of the ASIC design, architecture, reference models and micro-architecture using advanced verification methodologies.
Partner with our industry and account teams in a customer facing role to develop a keen understanding of customer goals, strategies, and technical needs as well as help to define and deliver high-value solutions meeting these needs. Document what you know and teach others.
Primary responsibilities will include deploying, managing, and validating AI Compute/HPC infrastructure in Linux-based environments for new and existing customers. Be the domain expert with partners during planning calls through implementation.
Serve as NVIDIA's technical SME, engaging with internal and external stakeholders, customers, users and product teams to design developer tools, APIs, and workflows for chemistry and materials science.
AI Factory deployment planning: Collaborate with NVIDIA product, engineering and partners teams to understand NVIDIA’s reference architecture for AI Factory infrastructure.
Build complex agentic systems featuring multi-agent coordination, long-horizon reasoning, and advanced planning frameworks. Develop full-scale solutions, including domain-specific enterprise agents and high-performance retrieval pipelines (RAG) spanning various data sources.
Accountable for managing and communicating processes, material readiness, build schedule exercises and communicating status back to the larger team in headquarter. Drive factory MP teams to efficiently and effectively check BOM/ECO implementation.
Provide hands-on technical mentorship to partners and customers on Nvidia GenAI stack. Guide customers to develope and deploy Agentic AI workflows on our platforms, quantifying the benefits of our accelerated computing software and hardware.
Drive architectural specifications to closure across multiple stakeholders. Develop written specifications for key component-level and system-level designs. Embody specifications in an executable model used by many customers across NVIDIA.
You and your teammates will own every part of the engineering mission of cuEST - from idea to shipped CUDA-X library.
Run AI factory validation tools, microbenchmarks, and workloads provided by the team, and interpret results to assess system health and performance. Gain a comprehensive understanding of the system from start to finish, including network topology, interconnects, and compute.
Define high-level SoC subsystem architecture for LPU products. Convert LPU product requirements into architectural specifications for uncore, IO, memory, firmware-facing, boot, reset, safety, fault tolerance, diagnostic, and power regulation subsystems.
Ability to resolve sophisticated customer concerns and technical issues through meticulous research, reproductions, and solving problems for customers installing our products and supporting systems using Linux Operating Systems (multi-distro), with the focus on NVIDIA Ethernet…
Define ICT capability, hardware design requirements, and board debug capabilities, enabling structural testing at Texas CM sites. Optimize structural test plans to identify SMT, PCB, and component issues early.
Track the cutting edge: How are agentic systems evolving? You'll follow research in tool use, planning, memory, evaluation, self-improvement, multi-agent workflows, runtime infrastructure, and agent safety/security.
Design and evaluate routing policies for LLM traffic to best use mixture of model systems. Build and run agentic benchmarks (e.g., Terminal-Bench ) to measure algorithm quality, and turn results into calibration data and routing profiles.
Provide onsite support for large datacenter deployments of NVIDIA AI solutions. Solving complex hardware and deployment issues.
Analyze the effect of different compilers and compiler optimizations on HPC application performance. Evaluate whether and how the compiler and runtime can improve the performance of key HPC applications on CPU and CPU/GPU platforms.
Developing software to enable efficient network design, deployment and day 2 management. Building product focused software solutions, used by internal and external customers.
Develop and sustain strong technical knowledge in quantum workloads important to the federal research community.
Lead customer engagement and business development activity with a major Silicon Valley account. Build strong strategic connections with customers' R&D teams to gain insight into customers' software, networking, and accelerated computing requirements.
Develop workflows for experimental processing/analysis and numerical simulations with applications in imaging science, plasma and high energy physics, and material science.
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