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Contribute to the Dynamo family of open source projects. Serve as a technical expert in AI inferencing, helping to push the frontier of what's possible. Represent Dynamo and NVIDIA with customers, partners and the AI community.
Identify, Recruit, Build and Lead partnerships with the strategic ISV partners that drive the adoption of NVIDIA software and services offerings and alignment at the business, product, and engineering levels.
Providing Ethernet and routing expertise to customers during project delivery to design, architect and test Ethernet networking AI solutions.
Understand and analyze the efficiency, scaling, and resilience challenges in ML systems, algorithms, and applications. Develop creative systems solutions (hardware, software, infrastructure) for future ML systems of all scales.
Architecting highly automated and customizable flows using modular builds and object-oriented techniques. Collaborating with architects and designers during active spec development to identify integration gaps and keep workstreams aligned.
Leading: Take a leadership role in defining product launch strategy and driving go-to-market plans that include effective messaging, positioning, and differentiation for the product narrative.
Lead the design and development of large-scale RL training frameworks to accelerate the development of multi-modal AV foundation models. Design, build, and optimize simulation and data processing pipelines to enable scalable training of driving policies.
Responsible for the development and execution of NVIDIA HGX/DGX/MGX platform test plan on servers, OS, FW and CUDA SW stack from design doc. Installing and testing various systems OS, server firmware and SW stack.
This role offers a unique opportunity to lead a team of skilled performance engineers collaborating directly with the developer community to unlock the full potential of NVIDIA's groundbreaking CPUs and GPUs!
Developing algorithms, models, and methods for robotic manipulation and loco-manipulation, for both industrial and household applications;
Enable C++ native execution of Spark operations on CUDA. Develop CUDA/C++ libraries to accelerate DataFrames and I/O operations on common file formats such as Parquet, ORC and JSON.
Collaborate with internal product, research, and engineering teams and external partners to define system requirements to enable fault-tolerant quantum computing.
Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.
Work on crafting creative Signal and Power Integrity solutions to complex system design problems. System-level power integrity simulations of high-performance AI systems, graphic cards, and Tegra systems.
Partner with NVIDIA Cloud Partners in GPU cluster design and networking and convey architecture and optimal process information for building next-generation architectures.
Working directly with core P&R engine developers to define real‑world optimization problems, shape requirements and roadmaps, and provide detailed feedback on engine behavior, QoR, and scalability.
Our team owns developing and executing the manufacturing process for new datacenter printed circuit boards and assemblies incorporating the latest NVIDIA GPU, interconnect and CPU technologies.
Developing innovative physical design methodologies for implementation of GPU, CPU, Network processors and SOC, with emphasis on PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes.
Work with sophisticated technologies and develop behavioral model and verification for custom mixed signal design cells that would be used on all the NVIDIA products.
Analyze full‑chip and unit‑level power using internal and industry‑standard RTL and gate‑level power tools, and translate data into concrete design and architectural improvements.
Develop drivers/tests and frameworks that can most efficiently stress the SOC/System and to see them through the full software development lifecycle. This can include working in user-space, kernel, firmware or boot software of SOC.
You will be responsible for all aspects of front-end design implementation methodologies (synthesis, formal-equivalence-checking), flow automation and application support. Develop in house solutions to improve NVIDIA's workflows.
Design, implement, unit test and debug changes in the NVIDIA SW stack to take next-gen HW from design / development stage to production. Be heavily involved in emulation, bring-up, and product hardening required to build our groundbreaking products.
Drive the software end-to-end architecture for NVIDIA's rack-scale products. Maintain deep understanding of the product portfolio and roadmap; translate forward-looking plans into clear, formal software requirements that anchor execution across the organization.
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