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Reconcile and synchronize downstream compiler codebases with open-source repositories, including restructuring, refactoring, and upstreaming internal changes where appropriate.
Design, build, and improve production-quality systems for world models, simulation, rendering, and real-time inference from prototype through release.
Develop Advanced FA Techniques & Methodologies. Precision De-processing: Perform mechanical cross-sectioning, parallel de-layering, and advanced chemical/plasma de-processing of integrated circuit (IC) devices across die, package, component, and board levels.
Develop and maintain deep technical expertise in the application of generative and agentic in digital health.
Develop and improve the technical design, architecture, and roadmap for 3D obstacle perception to support end-to-end autonomous driving functionalities, leveraging state-of-the-art CNN and transformer-based architectures where appropriate.
Architect, design, develop, and debug system software for NVIDIA Halos OS across QNX, Linux, and hypervisor-based environments. Design and develop BSP, boot, driver, device-management, diagnostics, and platform software for NVIDIA SoCs and edge AI platforms.
Architect, design, develop, and debug system software for NVIDIA Halos OS across QNX, Linux, and hypervisor-based environments. Design and develop BSP, boot, driver, device-management, networking, diagnostics and platform software for NVIDIA SoCs and edge AI platforms.
Architect, implement, and operate highly available messaging solutions using Microsoft Exchange (on-premises/hybrid/Exchange Online), Azure services, SMTP relays, and IMAP; establish and enforce architecture standards and best practices across regions/environments.
Provide technical mentorship to partners and customers on gigawatt-scale networking infrastructure deployments. Guide customer journey from design to build to production and post production stabilization.
Analyze the performance of application code running on NVIDIA GPUs with the aid of profiling tools. Identify opportunities for performance improvements in the MLIR/LLVM based compiler middle end optimizer.
Develop Rust-to-GPU Compiler Pipelines: Design, implement, and maintain custom compiler backends (such as rustc codegen backends and proc-macros) and Rust-native intermediate representation (IR) frameworks to compile standard Rust directly to high-performance CUDA PTX and…
Work closely across internal engineering and product teams as well as external app developers and enterprise ISVs on solving local end-to-end agentic AI GPU deployment challenges on NVIDIA RTX & DGX.
Manage the entire GTM cycle, including delivering wide-reaching 1:many developer activations and events, crafting GTM playbooks, and supporting targeted account interactions. Lead 1:many developer activations through technical workshops, webinars, and presentations at events.
Design and implement idiomatic Rust libraries and APIs for foundational CUDA functionality and GPU algorithms. Build safe Rust abstractions over native CUDA and C/C++ interfaces. Develop and maintain the C/C++ components required to support Rust-facing functionality.
Elevate and prioritize the most promising Semiconductor ecosystem providers based on capacity to scale, attract capital, and drive sustained sales offtake, ensuring alignment with NVIDIA's strategy.
Lead a multi-year volume and revenue forecast by product line. Focus strongly on the next four rolling quarters. Collaborate closely with Industry Business Development, Regional Sales, Finance, and Product Management teams.
Serving as the primary technical interface to MGX and ecosystem partners, including OEMs, ODMs, and component suppliers. Driving ecosystem growth by enabling partners to develop high-performance hardware solutions based on MGX platform specifications.
Collaborate across product and engineering teams, spanning the entire stack, to ensure release readiness and successful delivery of enterprise software while being viewed as a leader across all Business Units.
In this role, you will develop open source software to serve inference of trained AI models running on GPUs.
Analyze the effect of different compilers and compiler optimizations on HPC application performance. Evaluate whether and how the compiler and runtime can improve the performance of key HPC applications on CPU and CPU/GPU platforms.
Define verification scope, develop and drive testplans (functional and performance), and build scalable UVM-based infrastructure; leverage agentic AI to automate repetitive tasks, accelerate debug, and sharpen team efficiency.
You will compose and build the architecture behind next-generation self-driving vehicle technology. Work on Prediction, Decision, Planning and Control architecture. Have exposure to Classical safety stack. Build robust system-level safety and fallback strategies.
Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency. Use artificial intelligence to devliver RTL and/or Architecture Power optimization solutions.
Lead and grow a team of highly skilled engineers. Drive development of NvSci technology for next generation automotive and other Embedded applications. Apply and invent processes to ensure high software quality and reliable schedules.
US, USA